Ponderosa Design

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EasyCosim H/W Co-sim Solutions
 Standard Products

 Semi-Custom Products

EasyCosim S/W Co-sim Solutions
 S/W Co-sim with unidbg
 S/W Co-sim with EiC

Unidbg SoC System Debugger
 Overview
 Unidbg Product Tour

ParaSim Solutions
 Overview

SocGear ToolKit
 SoC ToolKit

16-bit / 32-bit microsequencer
 microsequencers

ASIC / FPGA Consulting

Downloads


Contacts



External Links

Free SPIlink Wiki Page
Unidbg Demo in SPIlink Wiki Page


System-on-Chip IP Solutions

Today's SoC projects

Today's SoC design is facing serious challenges validating the design. You need to validate not only your design but also the SoC project as a whole. Co-simulation solutions from Ponderosa Design allow you to test your design with real devices.

 

A sample SoC Design


 
 

Co-simulation of the sample SoC Design


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Ponderosa Design


 This page was last updated on 07/1/09